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-rw-r--r--quantum/stm32/chconf.h520
-rw-r--r--quantum/stm32/halconf.h388
-rw-r--r--quantum/stm32/mcuconf.h257
-rw-r--r--quantum/stm32/proton_c.mk44
4 files changed, 1209 insertions, 0 deletions
diff --git a/quantum/stm32/chconf.h b/quantum/stm32/chconf.h
new file mode 100644
index 000000000..1d9f12ff1
--- /dev/null
+++ b/quantum/stm32/chconf.h
@@ -0,0 +1,520 @@
1/*
2 ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio
3
4 Licensed under the Apache License, Version 2.0 (the "License");
5 you may not use this file except in compliance with the License.
6 You may obtain a copy of the License at
7
8 http://www.apache.org/licenses/LICENSE-2.0
9
10 Unless required by applicable law or agreed to in writing, software
11 distributed under the License is distributed on an "AS IS" BASIS,
12 WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13 See the License for the specific language governing permissions and
14 limitations under the License.
15*/
16
17/**
18 * @file templates/chconf.h
19 * @brief Configuration file template.
20 * @details A copy of this file must be placed in each project directory, it
21 * contains the application specific kernel settings.
22 *
23 * @addtogroup config
24 * @details Kernel related settings and hooks.
25 * @{
26 */
27
28#ifndef CHCONF_H
29#define CHCONF_H
30
31#define _CHIBIOS_RT_CONF_
32
33/*===========================================================================*/
34/**
35 * @name System timers settings
36 * @{
37 */
38/*===========================================================================*/
39
40/**
41 * @brief System time counter resolution.
42 * @note Allowed values are 16 or 32 bits.
43 */
44#define CH_CFG_ST_RESOLUTION 32
45
46/**
47 * @brief System tick frequency.
48 * @details Frequency of the system timer that drives the system ticks. This
49 * setting also defines the system tick time unit.
50 */
51#define CH_CFG_ST_FREQUENCY 100000
52
53/**
54 * @brief Time delta constant for the tick-less mode.
55 * @note If this value is zero then the system uses the classic
56 * periodic tick. This value represents the minimum number
57 * of ticks that is safe to specify in a timeout directive.
58 * The value one is not valid, timeouts are rounded up to
59 * this value.
60 */
61#define CH_CFG_ST_TIMEDELTA 2
62
63/** @} */
64
65/*===========================================================================*/
66/**
67 * @name Kernel parameters and options
68 * @{
69 */
70/*===========================================================================*/
71
72/**
73 * @brief Round robin interval.
74 * @details This constant is the number of system ticks allowed for the
75 * threads before preemption occurs. Setting this value to zero
76 * disables the preemption for threads with equal priority and the
77 * round robin becomes cooperative. Note that higher priority
78 * threads can still preempt, the kernel is always preemptive.
79 * @note Disabling the round robin preemption makes the kernel more compact
80 * and generally faster.
81 * @note The round robin preemption is not supported in tickless mode and
82 * must be set to zero in that case.
83 */
84#define CH_CFG_TIME_QUANTUM 0
85
86/**
87 * @brief Managed RAM size.
88 * @details Size of the RAM area to be managed by the OS. If set to zero
89 * then the whole available RAM is used. The core memory is made
90 * available to the heap allocator and/or can be used directly through
91 * the simplified core memory allocator.
92 *
93 * @note In order to let the OS manage the whole RAM the linker script must
94 * provide the @p __heap_base__ and @p __heap_end__ symbols.
95 * @note Requires @p CH_CFG_USE_MEMCORE.
96 */
97#define CH_CFG_MEMCORE_SIZE 0
98
99/**
100 * @brief Idle thread automatic spawn suppression.
101 * @details When this option is activated the function @p chSysInit()
102 * does not spawn the idle thread. The application @p main()
103 * function becomes the idle thread and must implement an
104 * infinite loop.
105 */
106#define CH_CFG_NO_IDLE_THREAD FALSE
107
108/** @} */
109
110/*===========================================================================*/
111/**
112 * @name Performance options
113 * @{
114 */
115/*===========================================================================*/
116
117/**
118 * @brief OS optimization.
119 * @details If enabled then time efficient rather than space efficient code
120 * is used when two possible implementations exist.
121 *
122 * @note This is not related to the compiler optimization options.
123 * @note The default is @p TRUE.
124 */
125#define CH_CFG_OPTIMIZE_SPEED TRUE
126
127/** @} */
128
129/*===========================================================================*/
130/**
131 * @name Subsystem options
132 * @{
133 */
134/*===========================================================================*/
135
136/**
137 * @brief Time Measurement APIs.
138 * @details If enabled then the time measurement APIs are included in
139 * the kernel.
140 *
141 * @note The default is @p TRUE.
142 */
143#define CH_CFG_USE_TM TRUE
144
145/**
146 * @brief Threads registry APIs.
147 * @details If enabled then the registry APIs are included in the kernel.
148 *
149 * @note The default is @p TRUE.
150 */
151#define CH_CFG_USE_REGISTRY TRUE
152
153/**
154 * @brief Threads synchronization APIs.
155 * @details If enabled then the @p chThdWait() function is included in
156 * the kernel.
157 *
158 * @note The default is @p TRUE.
159 */
160#define CH_CFG_USE_WAITEXIT TRUE
161
162/**
163 * @brief Semaphores APIs.
164 * @details If enabled then the Semaphores APIs are included in the kernel.
165 *
166 * @note The default is @p TRUE.
167 */
168#define CH_CFG_USE_SEMAPHORES TRUE
169
170/**
171 * @brief Semaphores queuing mode.
172 * @details If enabled then the threads are enqueued on semaphores by
173 * priority rather than in FIFO order.
174 *
175 * @note The default is @p FALSE. Enable this if you have special
176 * requirements.
177 * @note Requires @p CH_CFG_USE_SEMAPHORES.
178 */
179#define CH_CFG_USE_SEMAPHORES_PRIORITY FALSE
180
181/**
182 * @brief Mutexes APIs.
183 * @details If enabled then the mutexes APIs are included in the kernel.
184 *
185 * @note The default is @p TRUE.
186 */
187#define CH_CFG_USE_MUTEXES TRUE
188
189/**
190 * @brief Enables recursive behavior on mutexes.
191 * @note Recursive mutexes are heavier and have an increased
192 * memory footprint.
193 *
194 * @note The default is @p FALSE.
195 * @note Requires @p CH_CFG_USE_MUTEXES.
196 */
197#define CH_CFG_USE_MUTEXES_RECURSIVE FALSE
198
199/**
200 * @brief Conditional Variables APIs.
201 * @details If enabled then the conditional variables APIs are included
202 * in the kernel.
203 *
204 * @note The default is @p TRUE.
205 * @note Requires @p CH_CFG_USE_MUTEXES.
206 */
207#define CH_CFG_USE_CONDVARS TRUE
208
209/**
210 * @brief Conditional Variables APIs with timeout.
211 * @details If enabled then the conditional variables APIs with timeout
212 * specification are included in the kernel.
213 *
214 * @note The default is @p TRUE.
215 * @note Requires @p CH_CFG_USE_CONDVARS.
216 */
217#define CH_CFG_USE_CONDVARS_TIMEOUT TRUE
218
219/**
220 * @brief Events Flags APIs.
221 * @details If enabled then the event flags APIs are included in the kernel.
222 *
223 * @note The default is @p TRUE.
224 */
225#define CH_CFG_USE_EVENTS TRUE
226
227/**
228 * @brief Events Flags APIs with timeout.
229 * @details If enabled then the events APIs with timeout specification
230 * are included in the kernel.
231 *
232 * @note The default is @p TRUE.
233 * @note Requires @p CH_CFG_USE_EVENTS.
234 */
235#define CH_CFG_USE_EVENTS_TIMEOUT TRUE
236
237/**
238 * @brief Synchronous Messages APIs.
239 * @details If enabled then the synchronous messages APIs are included
240 * in the kernel.
241 *
242 * @note The default is @p TRUE.
243 */
244#define CH_CFG_USE_MESSAGES TRUE
245
246/**
247 * @brief Synchronous Messages queuing mode.
248 * @details If enabled then messages are served by priority rather than in
249 * FIFO order.
250 *
251 * @note The default is @p FALSE. Enable this if you have special
252 * requirements.
253 * @note Requires @p CH_CFG_USE_MESSAGES.
254 */
255#define CH_CFG_USE_MESSAGES_PRIORITY TRUE
256
257/**
258 * @brief Mailboxes APIs.
259 * @details If enabled then the asynchronous messages (mailboxes) APIs are
260 * included in the kernel.
261 *
262 * @note The default is @p TRUE.
263 * @note Requires @p CH_CFG_USE_SEMAPHORES.
264 */
265#define CH_CFG_USE_MAILBOXES TRUE
266
267/**
268 * @brief Core Memory Manager APIs.
269 * @details If enabled then the core memory manager APIs are included
270 * in the kernel.
271 *
272 * @note The default is @p TRUE.
273 */
274#define CH_CFG_USE_MEMCORE TRUE
275
276/**
277 * @brief Heap Allocator APIs.
278 * @details If enabled then the memory heap allocator APIs are included
279 * in the kernel.
280 *
281 * @note The default is @p TRUE.
282 * @note Requires @p CH_CFG_USE_MEMCORE and either @p CH_CFG_USE_MUTEXES or
283 * @p CH_CFG_USE_SEMAPHORES.
284 * @note Mutexes are recommended.
285 */
286#define CH_CFG_USE_HEAP TRUE
287
288/**
289 * @brief Memory Pools Allocator APIs.
290 * @details If enabled then the memory pools allocator APIs are included
291 * in the kernel.
292 *
293 * @note The default is @p TRUE.
294 */
295#define CH_CFG_USE_MEMPOOLS TRUE
296
297/**
298 * @brief Dynamic Threads APIs.
299 * @details If enabled then the dynamic threads creation APIs are included
300 * in the kernel.
301 *
302 * @note The default is @p TRUE.
303 * @note Requires @p CH_CFG_USE_WAITEXIT.
304 * @note Requires @p CH_CFG_USE_HEAP and/or @p CH_CFG_USE_MEMPOOLS.
305 */
306#define CH_CFG_USE_DYNAMIC TRUE
307
308/** @} */
309
310/*===========================================================================*/
311/**
312 * @name Debug options
313 * @{
314 */
315/*===========================================================================*/
316
317/**
318 * @brief Debug option, kernel statistics.
319 *
320 * @note The default is @p FALSE.
321 */
322#define CH_DBG_STATISTICS FALSE
323
324/**
325 * @brief Debug option, system state check.
326 * @details If enabled the correct call protocol for system APIs is checked
327 * at runtime.
328 *
329 * @note The default is @p FALSE.
330 */
331#define CH_DBG_SYSTEM_STATE_CHECK FALSE
332
333/**
334 * @brief Debug option, parameters checks.
335 * @details If enabled then the checks on the API functions input
336 * parameters are activated.
337 *
338 * @note The default is @p FALSE.
339 */
340#define CH_DBG_ENABLE_CHECKS FALSE
341
342/**
343 * @brief Debug option, consistency checks.
344 * @details If enabled then all the assertions in the kernel code are
345 * activated. This includes consistency checks inside the kernel,
346 * runtime anomalies and port-defined checks.
347 *
348 * @note The default is @p FALSE.
349 */
350#define CH_DBG_ENABLE_ASSERTS FALSE
351
352/**
353 * @brief Debug option, trace buffer.
354 * @details If enabled then the trace buffer is activated.
355 *
356 * @note The default is @p CH_DBG_TRACE_MASK_DISABLED.
357 */
358#define CH_DBG_TRACE_MASK CH_DBG_TRACE_MASK_DISABLED
359
360/**
361 * @brief Trace buffer entries.
362 * @note The trace buffer is only allocated if @p CH_DBG_TRACE_MASK is
363 * different from @p CH_DBG_TRACE_MASK_DISABLED.
364 */
365#define CH_DBG_TRACE_BUFFER_SIZE 128
366
367/**
368 * @brief Debug option, stack checks.
369 * @details If enabled then a runtime stack check is performed.
370 *
371 * @note The default is @p FALSE.
372 * @note The stack check is performed in a architecture/port dependent way.
373 * It may not be implemented or some ports.
374 * @note The default failure mode is to halt the system with the global
375 * @p panic_msg variable set to @p NULL.
376 */
377#define CH_DBG_ENABLE_STACK_CHECK TRUE
378
379/**
380 * @brief Debug option, stacks initialization.
381 * @details If enabled then the threads working area is filled with a byte
382 * value when a thread is created. This can be useful for the
383 * runtime measurement of the used stack.
384 *
385 * @note The default is @p FALSE.
386 */
387#define CH_DBG_FILL_THREADS FALSE
388
389/**
390 * @brief Debug option, threads profiling.
391 * @details If enabled then a field is added to the @p thread_t structure that
392 * counts the system ticks occurred while executing the thread.
393 *
394 * @note The default is @p FALSE.
395 * @note This debug option is not currently compatible with the
396 * tickless mode.
397 */
398#define CH_DBG_THREADS_PROFILING FALSE
399
400/** @} */
401
402/*===========================================================================*/
403/**
404 * @name Kernel hooks
405 * @{
406 */
407/*===========================================================================*/
408
409/**
410 * @brief Threads descriptor structure extension.
411 * @details User fields added to the end of the @p thread_t structure.
412 */
413#define CH_CFG_THREAD_EXTRA_FIELDS \
414 /* Add threads custom fields here.*/
415
416/**
417 * @brief Threads initialization hook.
418 * @details User initialization code added to the @p chThdInit() API.
419 *
420 * @note It is invoked from within @p chThdInit() and implicitly from all
421 * the threads creation APIs.
422 */
423#define CH_CFG_THREAD_INIT_HOOK(tp) { \
424 /* Add threads initialization code here.*/ \
425}
426
427/**
428 * @brief Threads finalization hook.
429 * @details User finalization code added to the @p chThdExit() API.
430 */
431#define CH_CFG_THREAD_EXIT_HOOK(tp) { \
432 /* Add threads finalization code here.*/ \
433}
434
435/**
436 * @brief Context switch hook.
437 * @details This hook is invoked just before switching between threads.
438 */
439#define CH_CFG_CONTEXT_SWITCH_HOOK(ntp, otp) { \
440 /* Context switch code here.*/ \
441}
442
443/**
444 * @brief ISR enter hook.
445 */
446#define CH_CFG_IRQ_PROLOGUE_HOOK() { \
447 /* IRQ prologue code here.*/ \
448}
449
450/**
451 * @brief ISR exit hook.
452 */
453#define CH_CFG_IRQ_EPILOGUE_HOOK() { \
454 /* IRQ epilogue code here.*/ \
455}
456
457/**
458 * @brief Idle thread enter hook.
459 * @note This hook is invoked within a critical zone, no OS functions
460 * should be invoked from here.
461 * @note This macro can be used to activate a power saving mode.
462 */
463#define CH_CFG_IDLE_ENTER_HOOK() { \
464 /* Idle-enter code here.*/ \
465}
466
467/**
468 * @brief Idle thread leave hook.
469 * @note This hook is invoked within a critical zone, no OS functions
470 * should be invoked from here.
471 * @note This macro can be used to deactivate a power saving mode.
472 */
473#define CH_CFG_IDLE_LEAVE_HOOK() { \
474 /* Idle-leave code here.*/ \
475}
476
477/**
478 * @brief Idle Loop hook.
479 * @details This hook is continuously invoked by the idle thread loop.
480 */
481#define CH_CFG_IDLE_LOOP_HOOK() { \
482 /* Idle loop code here.*/ \
483}
484
485/**
486 * @brief System tick event hook.
487 * @details This hook is invoked in the system tick handler immediately
488 * after processing the virtual timers queue.
489 */
490#define CH_CFG_SYSTEM_TICK_HOOK() { \
491 /* System tick event code here.*/ \
492}
493
494/**
495 * @brief System halt hook.
496 * @details This hook is invoked in case to a system halting error before
497 * the system is halted.
498 */
499#define CH_CFG_SYSTEM_HALT_HOOK(reason) { \
500 /* System halt code here.*/ \
501}
502
503/**
504 * @brief Trace hook.
505 * @details This hook is invoked each time a new record is written in the
506 * trace buffer.
507 */
508#define CH_CFG_TRACE_HOOK(tep) { \
509 /* Trace code here.*/ \
510}
511
512/** @} */
513
514/*===========================================================================*/
515/* Port-specific settings (override port settings defaulted in chcore.h). */
516/*===========================================================================*/
517
518#endif /* CHCONF_H */
519
520/** @} */
diff --git a/quantum/stm32/halconf.h b/quantum/stm32/halconf.h
new file mode 100644
index 000000000..8fe8e0c6f
--- /dev/null
+++ b/quantum/stm32/halconf.h
@@ -0,0 +1,388 @@
1/*
2 ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio
3
4 Licensed under the Apache License, Version 2.0 (the "License");
5 you may not use this file except in compliance with the License.
6 You may obtain a copy of the License at
7
8 http://www.apache.org/licenses/LICENSE-2.0
9
10 Unless required by applicable law or agreed to in writing, software
11 distributed under the License is distributed on an "AS IS" BASIS,
12 WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13 See the License for the specific language governing permissions and
14 limitations under the License.
15*/
16
17/**
18 * @file templates/halconf.h
19 * @brief HAL configuration header.
20 * @details HAL configuration file, this file allows to enable or disable the
21 * various device drivers from your application. You may also use
22 * this file in order to override the device drivers default settings.
23 *
24 * @addtogroup HAL_CONF
25 * @{
26 */
27
28#ifndef HALCONF_H
29#define HALCONF_H
30
31#include "mcuconf.h"
32
33/**
34 * @brief Enables the PAL subsystem.
35 */
36#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__)
37#define HAL_USE_PAL TRUE
38#endif
39
40/**
41 * @brief Enables the ADC subsystem.
42 */
43#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__)
44#define HAL_USE_ADC FALSE
45#endif
46
47/**
48 * @brief Enables the CAN subsystem.
49 */
50#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__)
51#define HAL_USE_CAN FALSE
52#endif
53
54/**
55 * @brief Enables the DAC subsystem.
56 */
57#if !defined(HAL_USE_DAC) || defined(__DOXYGEN__)
58#define HAL_USE_DAC TRUE
59#endif
60
61/**
62 * @brief Enables the EXT subsystem.
63 */
64#if !defined(HAL_USE_EXT) || defined(__DOXYGEN__)
65#define HAL_USE_EXT FALSE
66#endif
67
68/**
69 * @brief Enables the GPT subsystem.
70 */
71#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__)
72#define HAL_USE_GPT TRUE
73#endif
74
75/**
76 * @brief Enables the I2C subsystem.
77 */
78#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__)
79#define HAL_USE_I2C FALSE
80#endif
81
82/**
83 * @brief Enables the I2S subsystem.
84 */
85#if !defined(HAL_USE_I2S) || defined(__DOXYGEN__)
86#define HAL_USE_I2S FALSE
87#endif
88
89/**
90 * @brief Enables the ICU subsystem.
91 */
92#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__)
93#define HAL_USE_ICU FALSE
94#endif
95
96/**
97 * @brief Enables the MAC subsystem.
98 */
99#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__)
100#define HAL_USE_MAC FALSE
101#endif
102
103/**
104 * @brief Enables the MMC_SPI subsystem.
105 */
106#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__)
107#define HAL_USE_MMC_SPI FALSE
108#endif
109
110/**
111 * @brief Enables the PWM subsystem.
112 */
113#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__)
114#define HAL_USE_PWM FALSE
115#endif
116
117/**
118 * @brief Enables the QSPI subsystem.
119 */
120#if !defined(HAL_USE_QSPI) || defined(__DOXYGEN__)
121#define HAL_USE_QSPI FALSE
122#endif
123
124/**
125 * @brief Enables the RTC subsystem.
126 */
127#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__)
128#define HAL_USE_RTC FALSE
129#endif
130
131/**
132 * @brief Enables the SDC subsystem.
133 */
134#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__)
135#define HAL_USE_SDC FALSE
136#endif
137
138/**
139 * @brief Enables the SERIAL subsystem.
140 */
141#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__)
142#define HAL_USE_SERIAL FALSE
143#endif
144
145/**
146 * @brief Enables the SERIAL over USB subsystem.
147 */
148#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__)
149#define HAL_USE_SERIAL_USB TRUE
150#endif
151
152/**
153 * @brief Enables the SPI subsystem.
154 */
155#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__)
156#define HAL_USE_SPI FALSE
157#endif
158
159/**
160 * @brief Enables the UART subsystem.
161 */
162#if !defined(HAL_USE_UART) || defined(__DOXYGEN__)
163#define HAL_USE_UART FALSE
164#endif
165
166/**
167 * @brief Enables the USB subsystem.
168 */
169#if !defined(HAL_USE_USB) || defined(__DOXYGEN__)
170#define HAL_USE_USB TRUE
171#endif
172
173/**
174 * @brief Enables the WDG subsystem.
175 */
176#if !defined(HAL_USE_WDG) || defined(__DOXYGEN__)
177#define HAL_USE_WDG FALSE
178#endif
179
180/*===========================================================================*/
181/* ADC driver related settings. */
182/*===========================================================================*/
183
184/**
185 * @brief Enables synchronous APIs.
186 * @note Disabling this option saves both code and data space.
187 */
188#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__)
189#define ADC_USE_WAIT TRUE
190#endif
191
192/**
193 * @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs.
194 * @note Disabling this option saves both code and data space.
195 */
196#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
197#define ADC_USE_MUTUAL_EXCLUSION TRUE
198#endif
199
200/*===========================================================================*/
201/* CAN driver related settings. */
202/*===========================================================================*/
203
204/**
205 * @brief Sleep mode related APIs inclusion switch.
206 */
207#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__)
208#define CAN_USE_SLEEP_MODE TRUE
209#endif
210
211/*===========================================================================*/
212/* I2C driver related settings. */
213/*===========================================================================*/
214
215/**
216 * @brief Enables the mutual exclusion APIs on the I2C bus.
217 */
218#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
219#define I2C_USE_MUTUAL_EXCLUSION TRUE
220#endif
221
222/*===========================================================================*/
223/* MAC driver related settings. */
224/*===========================================================================*/
225
226/**
227 * @brief Enables an event sources for incoming packets.
228 */
229#if !defined(MAC_USE_ZERO_COPY) || defined(__DOXYGEN__)
230#define MAC_USE_ZERO_COPY FALSE
231#endif
232
233/**
234 * @brief Enables an event sources for incoming packets.
235 */
236#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__)
237#define MAC_USE_EVENTS TRUE
238#endif
239
240/*===========================================================================*/
241/* MMC_SPI driver related settings. */
242/*===========================================================================*/
243
244/**
245 * @brief Delays insertions.
246 * @details If enabled this options inserts delays into the MMC waiting
247 * routines releasing some extra CPU time for the threads with
248 * lower priority, this may slow down the driver a bit however.
249 * This option is recommended also if the SPI driver does not
250 * use a DMA channel and heavily loads the CPU.
251 */
252#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__)
253#define MMC_NICE_WAITING TRUE
254#endif
255
256/*===========================================================================*/
257/* SDC driver related settings. */
258/*===========================================================================*/
259
260/**
261 * @brief Number of initialization attempts before rejecting the card.
262 * @note Attempts are performed at 10mS intervals.
263 */
264#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__)
265#define SDC_INIT_RETRY 100
266#endif
267
268/**
269 * @brief Include support for MMC cards.
270 * @note MMC support is not yet implemented so this option must be kept
271 * at @p FALSE.
272 */
273#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__)
274#define SDC_MMC_SUPPORT FALSE
275#endif
276
277/**
278 * @brief Delays insertions.
279 * @details If enabled this options inserts delays into the MMC waiting
280 * routines releasing some extra CPU time for the threads with
281 * lower priority, this may slow down the driver a bit however.
282 */
283#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__)
284#define SDC_NICE_WAITING TRUE
285#endif
286
287/*===========================================================================*/
288/* SERIAL driver related settings. */
289/*===========================================================================*/
290
291/**
292 * @brief Default bit rate.
293 * @details Configuration parameter, this is the baud rate selected for the
294 * default configuration.
295 */
296#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__)
297#define SERIAL_DEFAULT_BITRATE 38400
298#endif
299
300/**
301 * @brief Serial buffers size.
302 * @details Configuration parameter, you can change the depth of the queue
303 * buffers depending on the requirements of your application.
304 * @note The default is 16 bytes for both the transmission and receive
305 * buffers.
306 */
307#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__)
308#define SERIAL_BUFFERS_SIZE 16
309#endif
310
311/*===========================================================================*/
312/* SERIAL_USB driver related setting. */
313/*===========================================================================*/
314
315/**
316 * @brief Serial over USB buffers size.
317 * @details Configuration parameter, the buffer size must be a multiple of
318 * the USB data endpoint maximum packet size.
319 * @note The default is 256 bytes for both the transmission and receive
320 * buffers.
321 */
322#if !defined(SERIAL_USB_BUFFERS_SIZE) || defined(__DOXYGEN__)
323#define SERIAL_USB_BUFFERS_SIZE 1
324#endif
325
326/**
327 * @brief Serial over USB number of buffers.
328 * @note The default is 2 buffers.
329 */
330#if !defined(SERIAL_USB_BUFFERS_NUMBER) || defined(__DOXYGEN__)
331#define SERIAL_USB_BUFFERS_NUMBER 2
332#endif
333
334/*===========================================================================*/
335/* SPI driver related settings. */
336/*===========================================================================*/
337
338/**
339 * @brief Enables synchronous APIs.
340 * @note Disabling this option saves both code and data space.
341 */
342#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__)
343#define SPI_USE_WAIT TRUE
344#endif
345
346/**
347 * @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs.
348 * @note Disabling this option saves both code and data space.
349 */
350#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
351#define SPI_USE_MUTUAL_EXCLUSION TRUE
352#endif
353
354/*===========================================================================*/
355/* UART driver related settings. */
356/*===========================================================================*/
357
358/**
359 * @brief Enables synchronous APIs.
360 * @note Disabling this option saves both code and data space.
361 */
362#if !defined(UART_USE_WAIT) || defined(__DOXYGEN__)
363#define UART_USE_WAIT FALSE
364#endif
365
366/**
367 * @brief Enables the @p uartAcquireBus() and @p uartReleaseBus() APIs.
368 * @note Disabling this option saves both code and data space.
369 */
370#if !defined(UART_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
371#define UART_USE_MUTUAL_EXCLUSION FALSE
372#endif
373
374/*===========================================================================*/
375/* USB driver related settings. */
376/*===========================================================================*/
377
378/**
379 * @brief Enables synchronous APIs.
380 * @note Disabling this option saves both code and data space.
381 */
382#if !defined(USB_USE_WAIT) || defined(__DOXYGEN__)
383#define USB_USE_WAIT TRUE
384#endif
385
386#endif /* HALCONF_H */
387
388/** @} */
diff --git a/quantum/stm32/mcuconf.h b/quantum/stm32/mcuconf.h
new file mode 100644
index 000000000..7c3c6e570
--- /dev/null
+++ b/quantum/stm32/mcuconf.h
@@ -0,0 +1,257 @@
1/*
2 ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio
3
4 Licensed under the Apache License, Version 2.0 (the "License");
5 you may not use this file except in compliance with the License.
6 You may obtain a copy of the License at
7
8 http://www.apache.org/licenses/LICENSE-2.0
9
10 Unless required by applicable law or agreed to in writing, software
11 distributed under the License is distributed on an "AS IS" BASIS,
12 WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13 See the License for the specific language governing permissions and
14 limitations under the License.
15*/
16
17#ifndef MCUCONF_H
18#define MCUCONF_H
19
20/*
21 * STM32F3xx drivers configuration.
22 * The following settings override the default settings present in
23 * the various device driver implementation headers.
24 * Note that the settings for each driver only have effect if the whole
25 * driver is enabled in halconf.h.
26 *
27 * IRQ priorities:
28 * 15...0 Lowest...Highest.
29 *
30 * DMA priorities:
31 * 0...3 Lowest...Highest.
32 */
33
34#define STM32F3xx_MCUCONF
35
36/*
37 * HAL driver system settings.
38 */
39#define STM32_NO_INIT FALSE
40#define STM32_PVD_ENABLE FALSE
41#define STM32_PLS STM32_PLS_LEV0
42#define STM32_HSI_ENABLED TRUE
43#define STM32_LSI_ENABLED TRUE
44#define STM32_HSE_ENABLED TRUE
45#define STM32_LSE_ENABLED FALSE
46#define STM32_SW STM32_SW_PLL
47#define STM32_PLLSRC STM32_PLLSRC_HSE
48#define STM32_PREDIV_VALUE 1
49#define STM32_PLLMUL_VALUE 9
50#define STM32_HPRE STM32_HPRE_DIV1
51#define STM32_PPRE1 STM32_PPRE1_DIV2
52#define STM32_PPRE2 STM32_PPRE2_DIV2
53#define STM32_MCOSEL STM32_MCOSEL_NOCLOCK
54#define STM32_ADC12PRES STM32_ADC12PRES_DIV1
55#define STM32_ADC34PRES STM32_ADC34PRES_DIV1
56#define STM32_USART1SW STM32_USART1SW_PCLK
57#define STM32_USART2SW STM32_USART2SW_PCLK
58#define STM32_USART3SW STM32_USART3SW_PCLK
59#define STM32_UART4SW STM32_UART4SW_PCLK
60#define STM32_UART5SW STM32_UART5SW_PCLK
61#define STM32_I2C1SW STM32_I2C1SW_SYSCLK
62#define STM32_I2C2SW STM32_I2C2SW_SYSCLK
63#define STM32_TIM1SW STM32_TIM1SW_PCLK2
64#define STM32_TIM8SW STM32_TIM8SW_PCLK2
65#define STM32_RTCSEL STM32_RTCSEL_LSI
66#define STM32_USB_CLOCK_REQUIRED TRUE
67#define STM32_USBPRE STM32_USBPRE_DIV1P5
68
69#undef STM32_HSE_BYPASS
70// #error "oh no"
71// #endif
72
73/*
74 * ADC driver system settings.
75 */
76#define STM32_ADC_DUAL_MODE FALSE
77#define STM32_ADC_COMPACT_SAMPLES FALSE
78#define STM32_ADC_USE_ADC1 FALSE
79#define STM32_ADC_USE_ADC2 FALSE
80#define STM32_ADC_USE_ADC3 FALSE
81#define STM32_ADC_USE_ADC4 FALSE
82#define STM32_ADC_ADC1_DMA_STREAM STM32_DMA_STREAM_ID(1, 1)
83#define STM32_ADC_ADC2_DMA_STREAM STM32_DMA_STREAM_ID(2, 1)
84#define STM32_ADC_ADC3_DMA_STREAM STM32_DMA_STREAM_ID(2, 5)
85#define STM32_ADC_ADC4_DMA_STREAM STM32_DMA_STREAM_ID(2, 2)
86#define STM32_ADC_ADC1_DMA_PRIORITY 2
87#define STM32_ADC_ADC2_DMA_PRIORITY 2
88#define STM32_ADC_ADC3_DMA_PRIORITY 2
89#define STM32_ADC_ADC4_DMA_PRIORITY 2
90#define STM32_ADC_ADC12_IRQ_PRIORITY 5
91#define STM32_ADC_ADC3_IRQ_PRIORITY 5
92#define STM32_ADC_ADC4_IRQ_PRIORITY 5
93#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY 5
94#define STM32_ADC_ADC2_DMA_IRQ_PRIORITY 5
95#define STM32_ADC_ADC3_DMA_IRQ_PRIORITY 5
96#define STM32_ADC_ADC4_DMA_IRQ_PRIORITY 5
97#define STM32_ADC_ADC12_CLOCK_MODE ADC_CCR_CKMODE_AHB_DIV1
98#define STM32_ADC_ADC34_CLOCK_MODE ADC_CCR_CKMODE_AHB_DIV1
99
100/*
101 * CAN driver system settings.
102 */
103#define STM32_CAN_USE_CAN1 FALSE
104#define STM32_CAN_CAN1_IRQ_PRIORITY 11
105
106/*
107 * DAC driver system settings.
108 */
109#define STM32_DAC_DUAL_MODE FALSE
110#define STM32_DAC_USE_DAC1_CH1 TRUE
111#define STM32_DAC_USE_DAC1_CH2 TRUE
112#define STM32_DAC_DAC1_CH1_IRQ_PRIORITY 10
113#define STM32_DAC_DAC1_CH2_IRQ_PRIORITY 10
114#define STM32_DAC_DAC1_CH1_DMA_PRIORITY 2
115#define STM32_DAC_DAC1_CH2_DMA_PRIORITY 2
116
117/*
118 * EXT driver system settings.
119 */
120#define STM32_EXT_EXTI0_IRQ_PRIORITY 6
121#define STM32_EXT_EXTI1_IRQ_PRIORITY 6
122#define STM32_EXT_EXTI2_IRQ_PRIORITY 6
123#define STM32_EXT_EXTI3_IRQ_PRIORITY 6
124#define STM32_EXT_EXTI4_IRQ_PRIORITY 6
125#define STM32_EXT_EXTI5_9_IRQ_PRIORITY 6
126#define STM32_EXT_EXTI10_15_IRQ_PRIORITY 6
127#define STM32_EXT_EXTI16_IRQ_PRIORITY 6
128#define STM32_EXT_EXTI17_IRQ_PRIORITY 6
129#define STM32_EXT_EXTI18_IRQ_PRIORITY 6
130#define STM32_EXT_EXTI19_IRQ_PRIORITY 6
131#define STM32_EXT_EXTI20_IRQ_PRIORITY 6
132#define STM32_EXT_EXTI21_22_29_IRQ_PRIORITY 6
133#define STM32_EXT_EXTI30_32_IRQ_PRIORITY 6
134#define STM32_EXT_EXTI33_IRQ_PRIORITY 6
135
136/*
137 * GPT driver system settings.
138 */
139#define STM32_GPT_USE_TIM1 FALSE
140#define STM32_GPT_USE_TIM2 FALSE
141#define STM32_GPT_USE_TIM3 FALSE
142#define STM32_GPT_USE_TIM4 FALSE
143#define STM32_GPT_USE_TIM6 TRUE
144#define STM32_GPT_USE_TIM7 TRUE
145#define STM32_GPT_USE_TIM8 TRUE
146#define STM32_GPT_TIM1_IRQ_PRIORITY 7
147#define STM32_GPT_TIM2_IRQ_PRIORITY 7
148#define STM32_GPT_TIM3_IRQ_PRIORITY 7
149#define STM32_GPT_TIM4_IRQ_PRIORITY 7
150#define STM32_GPT_TIM6_IRQ_PRIORITY 7
151#define STM32_GPT_TIM7_IRQ_PRIORITY 7
152#define STM32_GPT_TIM8_IRQ_PRIORITY 7
153
154/*
155 * I2C driver system settings.
156 */
157#define STM32_I2C_USE_I2C1 FALSE
158#define STM32_I2C_USE_I2C2 FALSE
159#define STM32_I2C_BUSY_TIMEOUT 50
160#define STM32_I2C_I2C1_IRQ_PRIORITY 10
161#define STM32_I2C_I2C2_IRQ_PRIORITY 10
162#define STM32_I2C_USE_DMA TRUE
163#define STM32_I2C_I2C1_DMA_PRIORITY 1
164#define STM32_I2C_I2C2_DMA_PRIORITY 1
165#define STM32_I2C_DMA_ERROR_HOOK(i2cp) osalSysHalt("DMA failure")
166
167/*
168 * ICU driver system settings.
169 */
170#define STM32_ICU_USE_TIM1 FALSE
171#define STM32_ICU_USE_TIM2 FALSE
172#define STM32_ICU_USE_TIM3 FALSE
173#define STM32_ICU_USE_TIM4 FALSE
174#define STM32_ICU_USE_TIM8 FALSE
175#define STM32_ICU_TIM1_IRQ_PRIORITY 7
176#define STM32_ICU_TIM2_IRQ_PRIORITY 7
177#define STM32_ICU_TIM3_IRQ_PRIORITY 7
178#define STM32_ICU_TIM4_IRQ_PRIORITY 7
179#define STM32_ICU_TIM8_IRQ_PRIORITY 7
180
181/*
182 * PWM driver system settings.
183 */
184#define STM32_PWM_USE_ADVANCED FALSE
185#define STM32_PWM_USE_TIM1 FALSE
186#define STM32_PWM_USE_TIM2 TRUE
187#define STM32_PWM_USE_TIM3 TRUE
188#define STM32_PWM_USE_TIM4 FALSE
189#define STM32_PWM_USE_TIM8 FALSE
190#define STM32_PWM_TIM1_IRQ_PRIORITY 7
191#define STM32_PWM_TIM2_IRQ_PRIORITY 7
192#define STM32_PWM_TIM3_IRQ_PRIORITY 7
193#define STM32_PWM_TIM4_IRQ_PRIORITY 7
194#define STM32_PWM_TIM8_IRQ_PRIORITY 7
195
196/*
197 * SERIAL driver system settings.
198 */
199#define STM32_SERIAL_USE_USART1 FALSE
200#define STM32_SERIAL_USE_USART2 TRUE
201#define STM32_SERIAL_USE_USART3 FALSE
202#define STM32_SERIAL_USE_UART4 FALSE
203#define STM32_SERIAL_USE_UART5 FALSE
204#define STM32_SERIAL_USART1_PRIORITY 12
205#define STM32_SERIAL_USART2_PRIORITY 12
206#define STM32_SERIAL_USART3_PRIORITY 12
207#define STM32_SERIAL_UART4_PRIORITY 12
208#define STM32_SERIAL_UART5_PRIORITY 12
209
210/*
211 * SPI driver system settings.
212 */
213#define STM32_SPI_USE_SPI1 FALSE
214#define STM32_SPI_USE_SPI2 FALSE
215#define STM32_SPI_USE_SPI3 FALSE
216#define STM32_SPI_SPI1_DMA_PRIORITY 1
217#define STM32_SPI_SPI2_DMA_PRIORITY 1
218#define STM32_SPI_SPI3_DMA_PRIORITY 1
219#define STM32_SPI_SPI1_IRQ_PRIORITY 10
220#define STM32_SPI_SPI2_IRQ_PRIORITY 10
221#define STM32_SPI_SPI3_IRQ_PRIORITY 10
222#define STM32_SPI_DMA_ERROR_HOOK(spip) osalSysHalt("DMA failure")
223
224/*
225 * ST driver system settings.
226 */
227#define STM32_ST_IRQ_PRIORITY 8
228#define STM32_ST_USE_TIMER 2
229
230/*
231 * UART driver system settings.
232 */
233#define STM32_UART_USE_USART1 FALSE
234#define STM32_UART_USE_USART2 FALSE
235#define STM32_UART_USE_USART3 FALSE
236#define STM32_UART_USART1_IRQ_PRIORITY 12
237#define STM32_UART_USART2_IRQ_PRIORITY 12
238#define STM32_UART_USART3_IRQ_PRIORITY 12
239#define STM32_UART_USART1_DMA_PRIORITY 0
240#define STM32_UART_USART2_DMA_PRIORITY 0
241#define STM32_UART_USART3_DMA_PRIORITY 0
242#define STM32_UART_DMA_ERROR_HOOK(uartp) osalSysHalt("DMA failure")
243
244/*
245 * USB driver system settings.
246 */
247#define STM32_USB_USE_USB1 TRUE
248#define STM32_USB_LOW_POWER_ON_SUSPEND FALSE
249#define STM32_USB_USB1_HP_IRQ_PRIORITY 13
250#define STM32_USB_USB1_LP_IRQ_PRIORITY 14
251
252/*
253 * WDG driver system settings.
254 */
255#define STM32_WDG_USE_IWDG FALSE
256
257#endif /* MCUCONF_H */
diff --git a/quantum/stm32/proton_c.mk b/quantum/stm32/proton_c.mk
new file mode 100644
index 000000000..a0fa01373
--- /dev/null
+++ b/quantum/stm32/proton_c.mk
@@ -0,0 +1,44 @@
1# Proton C MCU settings for converting AVR projects
2
3# These are defaults based on what has been implemented for ARM boards
4AUDIO_ENABLE = yes
5RGBLIGHT_ENABLE = no
6BACKLIGHT_ENABLE = no
7
8# The rest of these settings shouldn't change
9
10## chip/board settings
11# - the next two should match the directories in
12# <chibios>/os/hal/ports/$(MCU_FAMILY)/$(MCU_SERIES)
13MCU_FAMILY = STM32
14MCU_SERIES = STM32F3xx
15
16# Linker script to use
17# - it should exist either in <chibios>/os/common/ports/ARMCMx/compilers/GCC/ld/
18# or <this_dir>/ld/
19MCU_LDSCRIPT = STM32F303xC
20
21# Startup code to use
22# - it should exist in <chibios>/os/common/startup/ARMCMx/compilers/GCC/mk/
23MCU_STARTUP = stm32f3xx
24
25# Board: it should exist either in <chibios>/os/hal/boards/
26# or <this_dir>/boards
27BOARD = GENERIC_STM32_F303XC
28
29# Cortex version
30MCU = cortex-m4
31
32# ARM version, CORTEX-M0/M1 are 6, CORTEX-M3/M4/M7 are 7
33ARMV = 7
34
35USE_FPU = yes
36
37# Vector table for application
38# 0x00000000-0x00001000 area is occupied by bootlaoder.*/
39# The CORTEX_VTOR... is needed only for MCHCK/Infinity KB
40# OPT_DEFS = -DCORTEX_VTOR_INIT=0x08005000
41OPT_DEFS =
42
43# Options to pass to dfu-util when flashing
44DFU_ARGS = -d 0483:df11 -a 0 -s 0x08000000:leave
generated by cgit v1.2.3 (git 2.25.1) at 2025-07-12 16:52:27 +0000